(a) Field of the Invention
The present invention relates to a digital quadrature modulator and a method for testing the same, and more particularly to an improvement for a test circuit and test method for the impulse response storage member of the digital quadrature modulator implementing .pi./4 shift quadrature phase-shift keying (QPSK).
(b) Description of the Related Art
A quadrature modulator has been used in which signal processing is carried out in a digital format to adapt the modulator for a digital vehicular communication. A quadrature modulator of this kind is described by Suzuki et al. in "Digital Implementation of Orthogonal Modulator for FM", "SHINGAKU REVIEW" CS79-250 pp 31-36.
Quadrature modulators described in the literature as mentioned above includes one in which .pi./4 shift QPSK is carried out for a narrow-band frequency modulation and for eliminating interference between successive symbols. The quadrature modulator implementing .pi./4 QPSK comprises: a baseband section in which complex envelope signals or baseband signals including an inphase signal (I-signal) and an in-qudrature phase signal (Q-signal) are generated by processing input digital data through a low frequency processing; and a frequency conversion section in which RF output signal is generated by adding the outputs of two balanced modulators each modulating one of quadrature carriers by one of the baseband signals outputted from the low frequency section.
With the digital quadrature modulator as described above, there is an advantage in which setting an accurate roll-off factor and correction of the phase error in a mixer can be easily carried out, since the processing in the baseband section is carried out in a digital format. Such a processing is described by Tsuguo Maru in Japanese Patent Application No. Hei-3(1991)-321219. Additionally, it has an advantage in which the stability of frequency in the output modulated signal is as high as the stability of the output of a stabilized local oscillator.
In the baseband section of the digital quadrature modulator described above and implemented by an integrated circuit, an impulse response storage member or impulse response memory is used for storing impulse response sequence used during a convolution summer for implementing .pi./4 shift QPSK. When an integrated circuit implementing a baseband section of a quadrature modulator is fabricated, the contents stored in the impulse response memory of the baseband section must be tested during a functional test thereof. The content in each of the memory cells of the impulse response memory constituted by a read only memory is read out during the test sequence through I/O terminals of the integrated circuit to make sure that there is no defects such as a disconnection or a short circuit within the cell. Consequently, I/O terminals of bus lines for addressing the memory cells and for outputting the content of the impulse response memory are required in a number depending on the number of bits of the impulse response memory.
In order to reduce the chip size of an integrated circuit, the number of I/O terminals and protective buffers associated with the I/O terminals should be limited to a minimum. Therefore, it is desirable to reduce the number of I/O terminals as by employing a configuration in which the bus lines for testing the impulse response memory are connected to the bus lines for the internal registers of the baseband section. However, the bus lines for the internal registers are connected to the central processing unit (CPU) controlling the quadrature modulator from outside the chip, so that the complex envelope signals are subject to logic noises due to frequently changing signals on the bus lines connected to the internal register. Hence, a certain amount of spurious signals would be generated in the output of the baseband section during a normal operation due to the logic noises on the bus lines.